| Proj No. | A2192-251 |
| Title | Design of Low Voltage Low Noise Folded Cascode CMOS Op-Amp with Class AB output stage |
| Summary | The aim of this project is to design a ground compatible Folded Cascode CMOS Op-Amp with low noise. Candidate is expected to familiarise with the noise characteristics of the MOS transistors with respect to the W and L and the design of CMOS Op-Amps before embarking on the design. He or she has to verify the theoretical design with extensive simulations and recommend the most suitable ones for the design. The output stage should be in Class AB with output drive capable of 4 mA minimum and Ahuja frequency compensated. Layout should also be done after satisfying all corner simulations and also post-layout simulation after layout. This is a very challenging project for a student who has good electronic knowledge and strong interest in Integrated Circuit(IC) Design. 55nm CMOS/BCD-lite technology node will be used for the design with a Gain-Bandwidth product of >50 MHz with a typical supply of 1.8 V. |
| Supervisor | A/P Siek Liter (Loc:S2 > S2 B2C > S2 B2C 106, Ext: +65 67905441) |
| Co-Supervisor | - |
| RI Co-Supervisor | - |
| Lab | IC DESIGN I (Loc: S1-B2B-13) |
| Single/Group: | Single |
| Area: | Smart Electronics and IC design |
| ISP/RI/SMP/SCP?: |