Project details

School of Electrical & Electronic Engineering


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Proj No. A2186-251
Title Design of a Folded Cascode input with Rail-to-Rail Output Operational Amplifier at high PSRR
Summary The design of an Op-Amp with driving capability that is able to source and sink current. It should be implemented with the PMOS input pair with folded cascode input and able to handle output rail-to-rail swings. This design will be in the 55nm BCD lite technology, and should be able to work down from a maximum of 3.3V to 1.2V power supply with 60 degrees phase margin, GBW of 50MHz, open-loop gain of about 80dB, with an input-referred noise of about 500nV/sq.rt.Hz at 1kHz. Most likely with the Ahuja frequency compensation. The driving capability of the amplifier is for 60pF, and resistive load with current upto 10mA. The resulting circuit would be of great interest for a student with an inclination towards analog IC design.
Supervisor A/P Siek Liter (Loc:S2 > S2 B2C > S2 B2C 106, Ext: +65 67905441)
Co-Supervisor -
RI Co-Supervisor -
Lab IC DESIGN I (Loc: S1-B2B-13)
Single/Group: Single
Area: Smart Electronics and IC design
ISP/RI/SMP/SCP?: