| Proj No. | A2037-251 |
| Title | Design of a Low-Voltage Bulk-Driven CMOS Differential Difference Amplifier |
| Summary | For very low-voltage circuit design, the transistor threshold becomes one of the major obstacles that leads to the constrained voltage headroom under limited supply operation. To tackle the issue, bulk-driven CMOS design can permit lower supply operation but at the expense of finite device transconductance and so forth. The objective of the project is to investigate the circuit architecture and circuit technique for low-voltage 40nm CMOS differential difference amplifier dedicated to low-voltage analog signal-processing applications. The Cadence EDA tools will be used for simulation and verification. |
| Supervisor | A/P Chan Pak Kwong (Loc:S1 > S1 B1B > S1 B1B 45, Ext: +65 67904513) |
| Co-Supervisor | - |
| RI Co-Supervisor | - |
| Lab | IC DESIGN I (Loc: S1-B2B-13) |
| Single/Group: | Single |
| Area: | Smart Electronics and IC design |
| ISP/RI/SMP/SCP?: |