| Proj No. | A2038-251 |
| Title | Design of CMOS Power Amplifier with Super Driver |
| Summary | Power amplifier is one of the critical blocks dedicated to drive low resistance load. There is a design challenge when the power amplifier operates at low supply whilst requiring good driving capability. The objective of this project is to investigate the super driver topology and circuit technique that permits the design of 40nm CMOS power amplifier with significant efficiency whilst providing good stability. The Cadence EDA tools will be used for simulation and verification. |
| Supervisor | A/P Chan Pak Kwong (Loc:S1 > S1 B1B > S1 B1B 45, Ext: +65 67904513) |
| Co-Supervisor | - |
| RI Co-Supervisor | - |
| Lab | IC DESIGN I (Loc: S1-B2B-13) |
| Single/Group: | Single |
| Area: | Smart Electronics and IC design |
| ISP/RI/SMP/SCP?: |