| Proj No. | A2091-251 |
| Title | Hardware Implementation of ASCON Post-quantum Crypto Algorithm on FPGA |
| Summary | Lightweight cryptography is becoming increasingly important for IoT security, embedded systems, and constrained devices. ASCON, the winner of the NIST Lightweight Cryptography (LWC) competition, is designed to provide authenticated encryption (AEAD) and hashing while maintaining low power consumption and high efficiency. This project aims to implement the unprotected version of ASCON in hardware (Verilog) and evaluate its performance on FPGA. The focus will be on designing an efficient implementation without side-channel countermeasures, such as masking or threshold implementation. The student will implement ASCON-128, conduct hardware synthesis and timing analysis, and evaluate key performance metrics such as throughput, area utilization, and power consumption. |
| Supervisor | A/P Gwee Bah Hwee (Loc:S1 > S1 B1B > S1 B1B 42, Ext: +65 67906861) |
| Co-Supervisor | - |
| RI Co-Supervisor | - |
| Lab | IC DESIGN II (Loc: S1-B2B-10) |
| Single/Group: | Single |
| Area: | Smart Electronics and IC design |
| ISP/RI/SMP/SCP?: |