| Proj No. | B2168-251 |
| Title | Analog video filter for a camera system |
| Summary | The project focuses on developing a precision line sensor for accurate and reliable data capture in depth sensing applications. To achieve this, parasitic capacitance from the PCB trace geometry and load capacitance inherent in optical sensors need to be properly compensated using circuit design techniques. By implementing a targeted op-amp network optimized for the specific sensor readout frequency, the system maintains high signal integrity at the hardware level. This optimization maximizes the usable dynamic range of the Analog-to-Digital Converter (ADC), ensuring a high-fidelity data output. By refining the signal at the source and suppressing hardware-induced noise, tracking accuracy of the system is significantly enhanced, providing a robust foundation for precision-dependent industrial applications. Project Stages and Tasks: 1. System Design: Understand and design the schematics of the necessary analog circuit(s). 2. Design Verification: Verify the design through simulations to ensure stability, gain, and bandwidth requirements are met. 3. System Implementation: Help with the purchase of the desired components, mounting them on the PCBs and verifying the design experimentally. 4. Final Report: Compile and document findings and results in a comprehensive final report. The student may contribute to only one, or a few, or (ideally) all the activities listed above, depending on the available time, their background and skills, and other factors (e.g. collaboration with other parties, time needed for various other elements, etc.) While not mandatory, preliminary knowledge -or even proficiency- in MATLAB, Python, SPICE, Altium, and/or RISC programming is highly desirable and would be a big plus. This project is in collaboration with Singapore Institute of Manufacturing (SIMTech), where the student will carry out most of the work, joining a research team of experienced scientists and engineers, under the guidance of Dr. Seck Hon Luen as co-supervisor. |
| Supervisor | A/P Poenar Daniel Puiu (Loc:S2 > S2 B2A > S2 B2A 27, Ext: +65 67904237) |
| Co-Supervisor | - |
| RI Co-Supervisor | - |
| Lab | Machine Learning and Data Analytics Lab (Loc: S2.1-B4-01) |
| Single/Group: | Single |
| Area: | Intelligent Systems and Control Engineering |
| ISP/RI/SMP/SCP?: | ISP: Dr. Seck Hon Luen Senior Scientist II Singapore Institute of Manufacturing (SIMTech) hlseck@SIMTech.a-star.edu.sg |