| Proj No. | B2170-251 |
| Title | Optimized AI Inference: Deploying Distilled Models on FPGA and Microprocessors for Edge Computing |
| Summary | Deploying AI models on resource-constrained edge devices is critical for applications such as autonomous robotics, industrial automation, smart surveillance, and IoT-driven analytics. Model distillation, which reduces the complexity of deep learning models while retaining performance, enables efficient AI inference on low-power hardware. Implementing distilled models on FPGAs or microprocessors allows real-time processing, minimizing latency, and improving data security. This enhances system responsiveness in time-sensitive applications such as real-time defect detection in manufacturing and anomaly detection in surveillance systems. However, standard AI models often require substantial computational resources, making them impractical for edge deployment. FPGAs and specialized microprocessors offer hardware acceleration but require careful optimization of AI models to fit within limited resources. Challenges include memory constraints and accuracy trade-offs. Overcoming these obstacles through optimized model distillation techniques and efficient hardware-software co-design will enable useful deployment of AI-driven edge computing solutions in various industries. Project Stages and Tasks: 1. Literature Review: Research existing model distillation techniques and their effectiveness in reducing AI model complexity. Study FPGA and microprocessor-based AI inference, focusing on resource constraints and optimization methods. 2. AI Model Development: Design and optimize AI functions for real-time depth estimation, leveraging deep learning, computer vision, or classical image processing approaches. 3. Hardware Integration: Develop and integrate the AI model into an FPGA or microprocessor environment. 4. Performance Evaluation & Final Report: Validate AI model accuracy and efficiency, document results, and compile findings into a comprehensive report. The student may contribute to only one, or a few, or (ideally) all the activities listed above, depending on the available time, his background and skills, and other factors (e.g. collaboration with other parties, time needed for various other elements, etc.) While not mandatory, preliminary knowledge—or better yet, proficiency—in convolutional neural networks (CNNs), MATLAB, Python, and/or Verilog/VHDL is highly desirable and would be a big plus. This project is in collaboration with Singapore Institute of Manufacturing (SIMTech), where the student will carry out most of the work, joining a research team of experienced scientists and engineers, under the guidance of Dr. Seck Hon Luen as co-supervisor. It is preferrable if the student is willing to start the work earlier (BEFORE the school starts), namely to gradually begin as soon as possible after the end of the exam session. Since this is a company-based project the candidate(s) may first be interviewed by the company co-supervisor and the supervising prof. |
| Supervisor | A/P Poenar Daniel Puiu (Loc:S2 > S2 B2A > S2 B2A 27, Ext: +65 67904237) |
| Co-Supervisor | - |
| RI Co-Supervisor | - |
| Lab | Machine Learning and Data Analytics Lab (Loc: S2.1, B4-01) |
| Single/Group: | Single |
| Area: | Intelligent Systems and Control Engineering |
| ISP/RI/SMP/SCP?: | ISP: Dr. Seck Hon Luen Senior Scientist II Singapore Institute of Manufacturing (SIMTech) hlseck@SIMTech.a-star.edu.sg |