| Proj No. | A2152-251 |
| Title | Design of Low-Power CMOS Envelope Detector for Wake-Up Receivers |
| Summary | This project aims to design and simulate a low-power envelope detector circuit optimized for wake-up receiver applications in wireless sensor networks, where ultra-low standby energy consumption is critical. Using Cadence Virtuoso with the TSMC 65nm CMOS process design kit (PDK), the work will explore circuit-level architectures, device sizing strategies, and biasing techniques to achieve high sensitivity at low input signal levels while minimizing power consumption. |
| Supervisor | Dr Loo Xi Sung (Loc:S1 > S1 B1B > S1 B1B 43, Ext: +65 67905429) |
| Co-Supervisor | - |
| RI Co-Supervisor | - |
| Lab | Centre for Integrated Circuits & Systems (CICS) (Loc: S3.2-B2-05) |
| Single/Group: | Single |
| Area: | Smart Electronics and IC design |
| ISP/RI/SMP/SCP?: |