| Proj No. | A2284-251 |
| Title | Integrated Circuits Camouflaging Techniques and Evaluation |
| Summary | The typical IC designs face the risk where the attackers can illegally copy the designs through reverse engineering. One preventive way to counter the reverse engineering is to camouflage the circuit, i.e. select a number of standard cells in the circuit netlists and replace them with the camouflage cells. This FYP project relates to the software design for Camouflage tool in order to improve and evaluate the security of a circuit design. Python programming will be used to improve the current ready-to-use Camouflage tool. The student is expected to learn the tool and do the testing/analysis on the Camouflage circuits/netlists using the tool. |
| Supervisor | A/P Gwee Bah Hwee (Loc:S1 > S1 B1B > S1 B1B 42, Ext: +65 67906861) |
| Co-Supervisor | - |
| RI Co-Supervisor | - |
| Lab | INTEGRATED SYSTEMS RESEARCH (Loc: S1-B2A-04) |
| Single/Group: | Single |
| Area: | Smart Electronics and IC design |
| ISP/RI/SMP/SCP?: |